Link Verilog module with parameters (Design Compiler)

In the Design Compiler, Verilog files can be read in with the read? Verilog command and connected with the link command. Here is the script to connect the two files RegisterFile.v and Test.v: # Read design files file mkdir ./work define_design_lib WORK -path ./work read_verilog {RegisterFile.v Test.v} current_design Test link Where define des ...

Posted on Thu, 02 Apr 2020 05:10:00 -0700 by kustomjs

The realization of Verilog HDL traffic light

I really have nothing to do at home. I turned out the small experiment of EDA class in the last semester of my junior year, which is to design a traffic light for two lengzi. I can only flash at the set time, red light, green light, yellow light and turn signal; Time of each light: Gee, I'm too lazy to write. There are all the programs in the ...

Posted on Sat, 21 Mar 2020 09:05:09 -0700 by CJLeah

SV experiment -- switch1

I. Introduction We will verify the Switch RTL core. Here are the steps to verify the Switch RTL core. 1) Understanding specification s 2) Develop validation plan 3) Establish the verification environment. We'll build the environment in multiple phases, so you can easily learn step-by-step. Phase 1) we ...

Posted on Fri, 13 Mar 2020 04:12:20 -0700 by cfemocha

python makes FPGA EG01 constraint file text format batch change

python makes FPGA EG01 constraint file text format batch change All mechanical repetitive work should be automated 1. Read the original file 2. Mark important information 3. Extract important information 4. Reshape the format 5. Export and save All mechanical repetitive work should be automate ...

Posted on Fri, 06 Mar 2020 23:36:33 -0800 by ina

FPGA Beginners - write 9226 two-way acquisition code by yourself

This is a record of writing your own code If the car overturns, ask a big guy to correct it First, open quartus to create a new projectThen choose your own development board During the epidemic, when I was at home and didn't have a board, I chose a kind of development board that was often used by my fri ...

Posted on Sat, 01 Feb 2020 23:43:46 -0800 by acannings

Digital IC Preparedness School Recruitment day4 (Handshake Synchronization of Signal Trans-Clock Domain Transmission Problems)

Handshake Synchronization for Signal Transmission across Clock Domain The so-called handshake means that both sides of the communication use special control signals to indicate the status. This control signal is different from the one-way contro ...

Posted on Sun, 15 Sep 2019 05:24:50 -0700 by xxxzom_biexxx

Start with simple key shaking

The author is receiving on-line training on FPGA, so as to come to the end, it is an entry point in terms of level. When designing, it is found that it is very important to make some design summaries, which can help us clear our thinking and get a good review for future review. I've been studying altera FPGA before, and I'm not familiar with xi ...

Posted on Wed, 12 Jun 2019 10:20:33 -0700 by txmedic03

Asynchronous Reset and Synchronous Release Mechanism-Perfect Stability of the System

When I look back, I read two books and did a few minor projects. I watched some of the great gods chatting in QQ group. Sometimes I still put in a few sentences. It's normal that no one cares about a word. Sometimes they also help the netizens who are rookies to solve the problem. How embarrassing! In the words of the gods, they also draw a lit ...

Posted on Sat, 30 Mar 2019 19:06:28 -0700 by Otiose Dodge

Design of Multifunctional Digital Clock with verilog Based on basys2 (Rewrite)

Picture above before you say more         Preface Since learning FPGA, the only complete system that has ever been built is a multi-function digital table based on basys2. I remember that I had a lot of headaches when I did that. Finally, I used time to grind out a small system which was not very complete. At that time, I still had a full sens ...

Posted on Tue, 26 Mar 2019 07:27:29 -0700 by kiosklim

verilog Design Picture Display Based on LCDQC12864B Driven by basys2

Picture above before you say more   Preface When doing this experiment, I found a lot of information on the internet. It's all about using MCU to drive LCD display. It's really a lot easier to use MCU to drive LCD display. I remember when I asked questions in the learning and communication group of FPGA, I was instructed by my predecessors and ...

Posted on Tue, 26 Mar 2019 03:54:28 -0700 by tjhilder